An interview with Intel's leadership, including CTO Pushkar Ranade, on AI chip demand, lessons from 10nm, whether Intel can catch up to TSMC, Terafab, and more

The production of leading-edge chips is now limited by the number of available manufacturing tools, not just the innovation within a company.

Intel's CTO, Pushkar Ranade, discussed the unprecedented demand for AI chips, stating that current chipmaking tool capacity can only double leading-edge wafer production annually, falling short of AI's 3x growth. He highlighted the difficulty in meeting this demand surge, which has exceeded foundry capacity by 40-50%. Intel is developing new manufacturing processes, like 14A, which has been in development for over three years and is nearing finalization, involving around 2,000 intricate steps. The company has implemented maturity metrics and phase gates to ensure predictable schedules and limit innovation per node, learning from the costly delays of its 10nm node. Lessons from 10nm, which involved aggressive scaling and insufficient reliance on EUV lithography, have led Intel to integrate EUV earlier and adopt a more measured approach to innovation for subsequent nodes. Intel's efforts to catch up to TSMC include advancements in gate-all-around transistors, backside power, CFET, and hybrid bonding to address chip-to-chip bottlenecks.

The semiconductor industry faces a critical bottleneck where the demand for AI chips is growing at a rate of 3x annually, but the global supply of chipmaking tools can only accommodate a 2x increase in leading-edge wafer production. This gap means that even with aggressive internal development, foundries like Intel cannot solely solve the supply shortage. The constraint is external, residing in the capacity of tool suppliers such as ASML, which produce the essential EUV machines required for advanced chip manufacturing.

Intel's experience with its 10nm node, marked by aggressive innovation and significant delays, has led to a more cautious strategy for future nodes like 14A. The company now emphasizes rigorous maturity metrics and phase gates to ensure predictable development timelines and to manage the amount of innovation introduced per node. This approach aims to balance technological advancement with the urgent need for reliable, on-schedule production to meet the overwhelming demand driven by AI, indicating a shift towards more measured, yet consistent, process development in the industry.