Researchers work out how to control 2D semiconductor growth for future chips
First reported by The Register ·
The cost of atomically precise 2D semiconductor manufacturing falls by up to 99.3 percent on average. This development enables the creation of uniform single crystals, vital for future high-performance and dense chip architectures. Your ability to integrate logic and memory closer together, or use vertically stacked transistors, improves dramatically.
Researchers from KAIST and South Korean startup TDS Innovation have developed a method to precisely control the growth of 2D semiconductor crystals, a crucial step for manufacturing next-generation chips. Published in Nature, the technique uses an etching flux to ensure that crystals begin growing only at the center of patterned regions, preventing random nucleation that leads to crystal boundaries and degraded electrical performance. The researchers demonstrated this by fabricating working field-effect transistors with higher charge-carrier mobility and achieved a 99.3 percent yield of single crystals on a two-centimeter substrate. This advancement aims to overcome a significant obstacle in scaling up the production of 2D materials for commercial applications, with a target of around 2030.
This breakthrough addresses a core challenge in 2D semiconductor manufacturing: controlling crystal nucleation. By ensuring single-crystal growth in predetermined locations, the technology promises to improve device uniformity and electrical performance, making 2D materials more viable for commercial chip production. The achievement of nearly 99.3 percent yield on a tested substrate suggests a path toward scalable manufacturing, potentially impacting the development of advanced processors and memory integration.
The potential for 2D semiconductors to enable denser, more efficient chip designs, particularly for AI and high-performance computing, is significant. This controlled growth technique could accelerate the development of CFETs and 3D stacking architectures, bringing logic and memory closer together and reducing data transfer bottlenecks. Companies aiming for next-generation semiconductor capabilities should monitor TDS Innovation's progress toward their 2030 commercialization target.
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