Vectorized and performance-portable Quicksort

Sorting data can now be done up to 19x faster on a single CPU core, potentially unlocking new applications previously limited by sorting performance.

Google has released open-source code for a vectorized Quicksort algorithm that achieves sorting speeds approximately ten times faster than C++ std::sort. This new algorithm outperforms existing state-of-the-art, architecture-specific sorting methods while maintaining portability across modern CPU architectures like x86 (AVX2, AVX-512) and Arm (NEON). The performance gains are attributed to the efficient use of SIMD (Single Instruction, Multiple Data) vector instructions, particularly a "compress-store" instruction for partitioning, which is emulated using permute instructions on architectures where it's not natively available. The implementation leverages the Highway portable SIMD C++ library to abstract away platform-specific optimizations. It supports a wide range of integer inputs (16-128 bits) and demonstrates record-setting speeds on various hardware, including an Apple M1 chip and Intel Skylake processors. For example, on an Apple M1, it sorts at 466-499 MB/s, and on a Skylake with AVX-512, it reaches 1110-1123 MB/s, significantly exceeding standard library performance.

The core innovation lies in exploiting SIMD instructions for the partitioning step of Quicksort, a task that traditionally limits parallelization. By using hardware-accelerated "compress-store" or emulating it with permute instructions, the algorithm can process multiple data elements concurrently. This approach, generalized through the Highway library, allows for high performance across diverse CPU instruction sets without manual code duplication for each architecture.

This development signals a significant advancement in general-purpose sorting performance, particularly relevant for columnar databases and in-memory data processing. The ability to sort at gigabyte-per-second rates on a single core could fundamentally alter benchmarks and expectations for data-intensive workloads. It also highlights the growing maturity and applicability of portable SIMD libraries for achieving peak performance across heterogeneous hardware.